SynaptiCAD and Agilent Technologies combine to reduce
hardware & software verification times
BLACKSBURG, VA, January 15, 2001
-- SynaptiCAD Inc., the design technology leader for timing diagram editing and test bench
generation, today announced the release of WaveFormer Pro v7.1, which provides designers
with ability to translate simulation data into Agilent Pattern Generator files. This new
version provides an improved interface for translating VCD and other simulator formats
into pattern generator files, which drastically reduces the amount of time needed to
create a virtual prototype test bench. New features include pod mapping, selective
waveform import, export clocking signal selection, and binary pattern generator file
support. WaveFormer can also read data captured by any of the Agilent’s logic
analyzer including large binary files.
Reduce Verification Time by
Reusing Data
Designers are looking for new
methods to reduce verification time for both simulation models and hardware prototypes. In
many ways both of these environments suffer from the same problems of test vector
creation, test coverage, analysis of results, and detection of elusive timing problems.
There are many EDA tools and hardware test systems available to help solve these problems
in each environment, but in the past there has not been a way to leverage the work done in
one environment into the other. WaveFormer Pro solves this problem by uniting the worlds
of simulation and hardware verification, taking advantage of strengths offered by each
environment.
Two-Way Translation
The virtual prototyping setup
above shows how data that is generated in either a simulation environment or in a hardware
prototyping environment can be used to create test stimulus for the other. This waveform
translation is the key to reducing verification time for both simulation models and
hardware prototypes as it allows reuse of test data between environments. In the above diagram the waveform translator can accept waveform data
from either the simulation environment or from a logic analyzer. Once the waveform
translator has information it can generate either pattern generator files or VHDL and
Verilog test benches. The translator tool can also perform comparisons on waveforms from
the simulation environment and waveforms from the hardware environment.
Perform Simulations using
Captured Waveforms
The combination of
SynaptiCAD’s WaveFormer Pro and an Agilent’s logic analyzer makes a very
powerful design and debugging tool. Together, these products give the designer three
powerful debugging benefits. First, it allows captured waveforms to be used as stimulus
vectors to drive the simulation of a circuit for fast debugging. Second, it gives the
designer an integrated environment in which to view and compare actual captured results to
simulated results. And third, it allows advanced documentation of actual circuit
operation.
Pricing and Contact Information
WaveFormer Pro supports the
following Agilent products: 16700 & 16600 timing analysis system, HP 16522A pattern
generator module; HP 1660C and1670D benchtop logic analyzers; HP 16500B and 16500C logic
analysis system; HP 16550A, 16555D, and
16556D state timing card. WaveFormer Pro v7.1 is available on Windows 2000 / NT and on
Solaris/HP-UX. For more information or a free evaluation version, contact EuroEDA Limited.
Phone: +44 (0)1933 676373, Fax: +44 (0)1933 676372, Email: info@euro-eda.com. SynaptiCAD products are available
now in the UK, Ireland & Scandinavia from EuroEDA Limited. Use this link to view
detailed technical information about using WaveFormer Pro with Agilent products www.syncad.com/hpsupp.htm. |
